FMC-DA4

Summary

The FMC-DA4 is an FMC I/O Module, providing two Analog to Digital converters with 14-bit resolution and sampling rates up to 3Gsps, and two Digital to Analog converters with 16-bit resolution and sampling rates up to 2.7Gsps.

The FMC-DA4 is a VITA 57.1 compliant single width HPC FMC module, designed for use with Alpha Data's VITA 57.1 compliant carrier cards. It provides the user with dual high speed Analog to Digital Converters at 14bits/3GHz and dual high speed Digital to Analog converters at 16bits/2.7GHz along with an external clock input and clock output and a number of bidirectionl trigger/synchronisation signals.
Power Consumption ( 3GHz sampling, both ADC channels, 2GHz sampling both DAC channels) 25W, conduction cooled
On-board temperature monitoring
Requires FPGA speed grades of -2 or better to support 12.5 Gbps operation of serial links.

Applications

RF/IF Signal Sampling/Generation
High-speed Analog Data Capture
High-speed Analog Signal Generation

Board Features

Dual 14-bit 3Gsps ADCs
Dual 16-bit 2.7Gsps DACs
External Clock Input

Specification

Board Format

VITA 57.1 FPGA Mezzanine Card (FMC)

Environmental Specifications

Temperature Limits
Operating Temperature RangeStorage Temperature Range
MinMaxMinMax
CC1Conduction Cooled Industrial-40°C+70°C-55°C+100°C

Operating Humidity Range:
Up to 95% (non-condensing)


Host I/F

VITA FPGA Mezzanine Card Interface

I/O Interfaces

Interface TypeQtyDescription
ANALOG I/O (Front Panel)
ADC2Dual Analog to Digital Converters
Resolution: 14-bit
Max Clock Rate: 330Msps to 3Gsps
Bandwidth: 2 MHz to 3000 MHz
Impedance: 50Ω (AC Coupled)
Levels: ADC full scale input range is programmable from +10dBm to -10 dBm in 1 dB steps
Connector: SSMC or MCX
Dual 14bit/3Ghz ADCs
FSI Range adjustable in 1 dB steps
The DAC and ADC clocks must have a integer ratio
DAC2Dual Digital to Analog Converters
Resolution: 16-bit
Max Clock Rate: 2.7Gsps
Bandwidth: 4.5 MHz to 3000 MHz
Impedance: 50Ω (AC Coupled)
Levels: Power: +1 dBm to -30 dBm
Connector: SSMC or MCX
Dual 16bit/2.7GHz DACs
Programmable attenuation : to 31dB in 0.5 dB steps
DISCRETE I/O (Front Panel)
External clock input1External clock input
Max Clock Rate: 3GHz
Bandwidth: 10MHz to 3000MHz nominal
Impedance: 50Ω
Levels: -6 dBm to +12dBm (0dBm nominal)
Connector: SSMC or MCX
External clock output1External clock output
Max Clock Rate: 3GHz
Bandwidth: 10MHz to 3000MHz nominal
Impedance: 50Ω
Levels: Power: nominal 0 dBm
Connector: SSMC or MCX
Note: Clock output shall echo fastest of the ADC/DAC clock, internal or external clock source.
Trigger I/O1Trigger I/O
Impedance: 50Ω
Levels: +3V3 or 5V
Connector: SSMC or MCX
Auxiliary I/O1Auxiliary I/O
Impedance: 50Ω
Levels: +3V3 or 5V
Connector: SSMC or MCX
Synchronisation IO1ADC Sync Signal
Impedance: 50Ω
Levels: 1V8 - direct input/output of the FPGA
Connector: U.FL
DISCRETE I/O (PCB Connectors)
Synchronisation I/O2Bidirectional Fast IO Signals direct from FPGA.
Impedance: Direct connection to FPGA
Levels: +1V8
Connector: U.FL - Limited Access in assembled system

Ordering Information

Ordering Code
FMC-DA4

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Resources:


Deliverables

FMC-DA4 Board
One-Year Warranty
One-Year Technical Support

Support

Please contact Alpha Data for full details on the available support packages for the FMC-DA4.

Sales Questions

Sales Questions

For any sales questions please e-mail us at [email protected]

Sales Questions

Technical Support

For any technical questions please e-mail us at [email protected]

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