ADM-XRC-7V1 - Digital Signal Processing


Photo 1 of adm-xrc-7v1Photo 2 of adm-xrc-7v1Photo 3 of adm-xrc-7v1Photo 4 of adm-xrc-7v1Main Photo of adm-xrc-7v1  Board: FPGA COTS board: Xilinx Virtex-7, XMC, DDR3 SDRAM, PCIE : Comm, Ind, Mil Virtex-7

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ADM-XRC-7V1 Documents

Datasheet v1.4 (pdf)

User Manual v1.8 (pdf)

Support and Development Kit

For more details on the ADM-XRC Gen 3 SDK and ADB3 Driver see the ADM-XRC Gen 3 SDK Page.

Contact Alpha Data support if you have any problems or questions.

Windows SDK: v1.7.0 (1 Dec 2014)

Linux SDK: v1.7.0 (1 Dec 2014)

Windows Driver: v1.4.19 (8 Oct 2018)

Linux Driver: v1.4.19 (8 Oct 2018)

Associated Documentation

Product Notice



  • Digital Signal Processing
  • Radar/Sonar Beamforming
  • Image/Video Processing
  • Data Encryption

Board Features

  • Xilinx Virtex-7 XC7V585T FPGA
  • Air-Cooled/Conduction-Cooled Options
  • Separate PCI Express Bridge
  • XRM2 I/O Interface
  • COTS Product
  • XMC (Switched Mezzanine Card, VITA 42)

FPGA Features (Hard IP)

  • 2x PCI Express cores (Gen2 or Gen3 - FPGA dependent)


The ADM-XRC-7V1 is a high performance reconfigurable XMC (compliant to VITA Standard 42.0 and 42.3) based on the Xilinx Virtex-7 range of Platform FPGAs.

Features include PCI Express Gen2 interface, external memory, high density I/O, system monitoring and flash boot facilities.

A comprehensive cross platform API with support for Microsoft Windows, Linux and VxWorks provides access to the full functionality of these hardware features.

Placing the PCI Express bridge in bypass allows the creation of a Gen 2 x8 PCI Express endpoint design directly into the target FPGA. Target FPGAs VX330T and VX690T can also support Gen3 x8 PCI Express designs.

The optional fitting of the Pn4 connector provides an additional 64 General Purpose IO (GPIO) links to the carrier card.

The ADM-XRC-7V1 is available in a cost reduced form for high-volume production orders (the build option removes the Virtex-6 Bridge device).

Board Format

XMC (Switched Mezzanine Card, VITA 42)

Environmental Specifications

Temperature Limits:

CodeCooling OptionOperating Temp.Storage Temp.
AC0Air Cooled Commercial0°C+55°C-40°C+85°C
ACEAir Cooled Extended0°C+70°C-55°C+100°C
AC1Air Cooled Industrial-40°C+70°C-55°C+100°C
CC0Conduction Cooled Commercial0°C+55°C-40°C+85°C
CCEConduction Cooled Extended0°C+70°C[1]-55°C+100°C
CC1Conduction Cooled Industrial-40°C+70°C[1]-55°C+100°C
[1] - with high-efficiency system cooling this can be raised to 85°C - Contact Alpha Data for more details

Conformal Coating Options:

Acrylic or Polyurethane

Contact sales for specification of coatings.

Operating Humidity range:

Up to 95% (non-condensing)

EMC Conformity:

FCC 47CFR Part 2
EN55022:2010 Equipment ClassB

For more information on the operating conditions for the different cooling options go to: Alpha Data Environmental Specification Page.

Or read: Alpha Data Environment Specification (PDF).

Host I/F

PCI Express® Gen2 x1, x2 or x4 link to separate bridge device with 2GB/s local link to user FPGA. 4 DMA Controllers. Interrupt Controller

Target FPGA Device

Xilinx Virtex® -7

XC7V585T XC7VX330T XC7VX485T XC7VX690T - FF(G)1761, FH(G)1761 or FLG(G)1761

FPGA Resources

Chosen DeviceFFsLUTsDSPsBRAM

FPGA Hard IP Cores

  • 2x PCI Express cores (Gen2 or Gen3 - FPGA dependent)

On Board Memory options

Memory TypeNo. BanksMemory Size (per bank)
SDRAM4512MB DDR3-1600
1GB DDR3-1600

Target FPGA Configuration

  • PCI Express direct to SelectMAP port
  • From Flash direct on power up
  • External JTAG connector

FPGA Configuration Flash

Flash TypeFlash SizeDescription

On-board Clock Specifications

  • Low-jitter 250MHz reference clock, suitable for SerDes applications
  • Low-jitter 200MHz reference clock for IOB delay circuits
  • Custom clock inputs available through the XRM2 interface
  • Two Software-Programmable Clocks

I/O Interfaces

Interface TypeQtyDescription
Discrete Digital146LVCMOS/LVDS I/O (programmable to 1.2, 1.5 or 1.8V)
Serial Links
8High-Speed Serial Links to XRM2
REAR I/O (Pn6)
Serial Links
10High-Speed Serial Links via Pn6 connector
Discrete Digital38LVCMOS 3.3V GPIO connections via Pn6 connector (VITA 46.9 X8d+X12d+X38s compatible pinout)
REAR I/O (Pn4)
Discrete Digital64Multiple LVCMOS/LVDS GPIO connections via optional PMC Pn4 connector (1.8V levels with 2.5V compatible inputs)
only available with Pn4 Build Option selected


The ADM-XRC-7V1 is supplied with the ADMXRCG3 Support & Development kit (SDK) along with ADB3 Driver for Windows / Linux / VxWorks. (see left)

Ordering Code
ParametercodeParameter Description
Virtex-7 devicez


Virtex-7 speedy

1, 2, 3


blank = 2GBytes on board SDRAM (Four banks of 512MBytes),
/4 = 4GByte on board SDRAM (Four banks of 1GByte)


blank = air cooled commercial,
/ACE = air cooled Extended,
/AC1 = air cooled industrial,
/CC0 = conduction cooled Commercial,
/CCE = conduction cooled Extended,
/CC1 = conduction cooled industrial

Conformal Coatinga

blank = no conformal coating,
A = Acrylic,
P = Polyurethane

Pn4 Fittedp

blank = not fitted,
/Pn4 = Pn4 Connector fitted

XMC Connector Typet

blank = XMC (VITA 42) Connectors ,
/X2 = XMC2 (VITA 61) Connectors


not all FPGA speed grades available in all configurations.
Contact Alpha Data for full details.

Contact sales for other ordering options


  • ADM-XRC-7V1 Board
  • One Year Warranty
  • One Year Technical Support

Sales Questions

For any sales questions regarding the ADM-XRC-7V1, please e-mail us at:

Technical Support

For any technical questions regarding Alpha-Data products please e-mail us at:

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