Summary

The ADM-VPX3-9V2 is a high-performance reconfigurable 3U OpenVPX format board based on the AMD Virtex UltraScale Plus range of Platform FPGAs.

This board features the VU9P or VU13P top-end Ultrascale+ FPGAs combined with 16GB of DDR4 memory arranged in 4 independent banks. This board is extremely well suited for high bandwidth switching applications, processing data coming in and out of the VPX backplane and optionally through the front panel optical connections available via the Firefly connectors. The board can also be configured as a very high bandwidth processing offload accelerator within VPX systems for applications such as Radar, Signal processing and Machine Learning which can utilize the very high DSP performance of the top-end VU9P and VU13P Ultrascale+ FPGA devices. The Open Group Sensor Open Systems Architecture™ influenced the development of this board and the ADM-VPX3-9V2 is aligned with the SOSA™ Technical Standard.

Applications

High-speed Smart Switching
Edge Machine Learning Inference
Signal Processing
Radar/Sonar
Multiple Network Interface

Board Features

16GByte on-board DDR4-2666 SDRAM
Fully ruggedized for VITA 48.2 REDI compliance
0.8inch pitch without rear cover for highest density
1inch pitch with rear cover for improved thermal path
Convenient front panel debug breakout

FPGA Features (Hard IP)

4x PCIe® Gen3x16
8x 150G Interlaken
12x 100G Ethernet w/KR4 RS-FEC
Up to 12288x DSP Slices

Specification

Standards

The ADM-VPX3-9V2 is aligned with the SOSA™ Technical Standard and compliant with OpenVPX compliant slot Standards:

SLT3-PAY-2F1F2U-14.2.1SLT3-PAY-1F2F2U-14.2.2
SLT3-PAY-1D-14.2.6SLT3-PAY-1F1F2U-14.2.4
SLT3-PAY-2F-14.2.7SLT3-PAY-1F4U-14.2.8
SLT3-PAY-8U-14.2.9SLT3-PAY-1F1U-14.2.10
SLT3-PAY-2F4F2U-14.2.11SLT3-PAY-1F2U-14.2.12
SLT3-PAY-3F2U-14.2.13SLT3-PAY-2U2U-14.2.17
SLT3-PER-2F-14.3.1SLT3-PER-1F-14.3.2
SLT3-PER-1U-14.3.3SLT3-PER-1Q-14.3.4
SLT3-SWH-6F6U-14.4.1SLT3-SWH-8F-14.4.2
SLT3-SWH-2F24U-14.4.3SLT3-SWH-4F-14.4.4
SLT3-SWH-2F8U-14.4.5SLT3-SWH-6F8U-14.4.9
SLT3-SWH-6F8U-14.4.9

Board Format

3U VPX (OpenVPX Compliant)

Environmental Specifications

Temperature Limits
Operating Temperature RangeStorage Temperature Range
MinMaxMinMax
AC1Air Cooled Industrial-40°C+85°C-55°C+100°C
CC1Conduction Cooled Industrial-40°C+85°C-55°C+100°C

Operating Humidity Range:
Up to 95% (non-condensing)


Host I/F

PCI Express Gen3 x16


Target Device

AMD Virtex® UltraScale+
XCVU9P-2, XCVU13P-2 (B2104)

FPGA Resources

Chosen DeviceFFsLUTsDSPsBRAMURAM
XCVU9P-22364k1182k684075.0Mb270Mb
XCVU13P-23456k1728k1228894.5Mb360Mb

FPGA Hard IP Cores

4x PCIe® Gen3x16
8x 150G Interlaken
12x 100G Ethernet w/KR4 RS-FEC
Up to 12288x DSP Slices

On Board Memory

Memory TypeNo. BanksMemory Size (per bank)
SDRAM44GBytes @72bit wide ECC DDR4-2666 - 4GBytes @72bit wide ECC

Target FPGA Configuration

Via QSPI or JTAG


FPGA Configuration Flash

Flash TypeFlash Size
QSPI2Gb (x4 Interface)

On-board Clock Specifications

MGT clock 0 (Programmable : default 250MHz)
MGT clock 1 (Programmable : default 156.25MHz)
Memory clock (Programmable : default 300MHz)
Fabric clock (Fixed Clock : 300MHz)
VPX REFCLK selectable between - Direct connection to FPGA MGTREFCLK0_224 or Synchronous clock tree source (when 25MHz only)


I/O Interfaces

Interface TypeQtyDescription
FRONT I/O (or VPX with appropriate build variant)
Firefly24x HSSIO - Firefly Interface 28Gbps per channel (up to 112Gbps total Bandwidth per Firefly Connection)
VPX CONNECTOR I/O (P1)
HSSIO P116Configurable as 4 fat pipes, 8 thin pipes or 16 ultra-thin pipes
Serial Comms P11MP01 (Maintenance Port). Compatible with RS232 and 3.3V UART (build option dependent)
VPX CONNECTOR I/O (P2)
HSSIO P216Configurable as 4 fat pipes, 8 thin pipes or 16 ultra-thin pipes
Serial Comms P21MP02 (Maintenance Port). Compatible with RS232 and 3.3V UART (build option dependent) - can be discrete GPIO if comms port not required
GPIO P26Single Ended GPIO (x8 if MP02 is not required)

Ordering Information

Ordering Code
ADM-VPX3-9V2/(F)(c)(a)(n)
ParameterCodeParameter Description
FPGAFVU9P-2 = VU9P-2 AMD Virtex UltraScale+ FPGA,
VU13P-2 = VU13P-2 AMD Virtex UltraScale+ FPGA
Coolingc/AC1 = air cooled industrial,
/CC1 = conduction cooled industrial
Conformal Coatingablank = no conformal coating,
A = Acrylic,
P = Polyurethane
NVMRO Optionsnblank = NVMRO Option Disabled,
/NV = NVMRO Option Enabled
noteContact Sales for other ordering options

Related Products

The ADM-VPX3-9V2 does not have any related products.

Resources:

Reference Designs: (RD-9V2)

RD-9V2 contains a suite of Vivado reference designs demonstrating how to use the board, including PCIe DMA examples, DDR4 memory examples, and GT IBERT example.

PCIe examples are compatible with the ADXDMA Driver and API.

Download Reference Designs [Login Required]

Download the ADXDMA Driver [Login Required]


Deliverables

ADM-VPX3-9V2 Board
One-Year Warranty
One-Year Technical Support

Support

Please contact Alpha Data for full details on the available support packages for the ADM-VPX3-9V2.

Sales Questions

Sales Questions

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Sales Questions

Technical Support

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