ADM-XRC-KU1

Summary

The ADM-XRC-KU1 is a high performance reconfigurable XMC (compliant to VITA Standard 42.0 and 42.3) based on the AMD Kintex Ultrascale range of Platform FPGAs.


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Features include PCI Express Gen2 interface, external memory, high density I/O, system monitoring and flash boot facilities.
A comprehensive cross platform API with support for Microsoft Windows, Linux and VxWorks provides access to the full functionality of these hardware features.
Board management is provided by the combination of the Artix FPGA and AVR Microcontroller. This allows the board to be managed via PCI Express or via USB.
The KU1 provides multiple communications modes:
PCI Express Gen2 x4 through the Artix FPGA with an optional Gen3 x4 PCI Express link direct to the target FPGA.
Gen3 x8 PCI Express link direct to the target when the bridge is in USB mode.
An optional Gen3 x8 PCI Express link provided through Pn6 using a compatible XMC carrier.

Applications

Embedded Data Processing
Radar/Sonar Beamforming
ELINT
Image/Video Processing
Digital Signal Processing
Data Encryption

Board Features

Air-Cooled/Conduction-Cooled Options
Separate PCI Express Bridge
XRM2 I/O Interface

FPGA Features (Hard IP)

3x PCI Express Gen3 x8 cores (6 for XCKU115)

Specification

Board Format

XMC (Switched Mezzanine Card, VITA 42)

Environmental Specifications

Temperature Limits
Operating Temperature RangeStorage Temperature Range
MinMaxMinMax
AC0Air Cooled Commercial0°C+55°C-40°C+85°C
AC1Air Cooled Industrial-40°C+70°C-55°C+100°C
CC1Conduction Cooled Industrial-40°C+70°C-55°C+100°C

Operating Humidity Range:
Up to 95% (non-condensing)


Host I/F

PCI Express Gen2 x4 (Separate bridge FPGA) or Gen3 x8 (direct from Target FPGA)


Target Device

AMD Kintex® UltraScale™
XCKU060, XCKU115 (FLVA1517)

FPGA Resources

Chosen DeviceFFsLUTsDSPsBRAM
XCKU060663k221k276038.0Mb
XCKU1151326k663k552075.9Mb

FPGA Hard IP Cores

3x PCI Express Gen3 x8 cores (6 for XCKU115)

On Board Memory

Memory TypeNo. BanksMemory Size (per bank)
SDRAM42GB DDR4-2400

Target FPGA Configuration

By PCI Express Bridge on power up
By software via PCI Express Bridge
Via External JTAG connector


FPGA Configuration Flash

Flash TypeFlash Size
BPI1GBit

On-board Clock Specifications

Low-jitter 250MHz reference clock, suitable for SerDes applications
Low-jitter 300MHz reference clock for IOB delay circuits
Custom clock inputs available through the XRM2 interface
Two Software-Programmable Clocks


I/O Interfaces

Interface TypeQtyDescription
FRONT I/O (XRM2)
Discrete146LVCMOS/LVDS I/O (programmable to 1.2, 1.5 or 1.8V) to XRM2 (x146)
High-Speed
Serial Links
8High-Speed Serial Links to XRM2 (x8)
REAR I/O (Pn6)
High-Speed
Serial Links
10High-Speed Serial Links via Pn6 connector, Standard build has 9 TX/RX data capable links and one external clock input. There is a build option available to use the external clock input as a 10th TX/RX data link.
Discrete I/O38LVCMOS 3.3V GPIO connections via Pn6 connector (VITA 46.9 X8d+X12d+X38s compatible pinout)
REAR I/O (Pn4)
Discrete I/O64Multiple LVCMOS/LVDS GPIO connections via optional PMC Pn4 connector (1.8V levels with 2.5V compatible inputs)
Note: only available with Pn4 Build Option selected

Ordering Information

Ordering Code
ADM-XRC-KU1/z-2(c)(a)(p)(IO)
ParameterCodeParameter Description
Kintex Ultrascale devicezKU060 = XCKU060 FPGA fitted,
KU115 = XCKU115 FPGA fitted
Pn4 Fittedpblank = not fitted,
/Pn4 = Pn4 connector fitted
Coolingcblank = air cooled commercial,
/AC1 = air cooled industrial,
/CC1 = conduction cooled industrial
Conformal coatingablank = no conformal coating,
A = Acrylic,
P = Polyurethane
IO OptionIOblank = One differential pair on Pn6 designated as an external clock input,
/10RX = External clock input replaced by 10th data input

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Resources:


Deliverables

ADM-XRC-KU1 Board
One-Year Warranty
One-Year Technical Support

Support

Please contact Alpha Data for full details on the available support packages for the ADM-XRC-KU1.

Sales Questions

Sales Questions

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Sales Questions

Technical Support

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